10. A 64-MiB main memory is byte-addressable. A 4-way set-associative cache of 32 KiB uses 64-byte lines. Number of tag bits in a 32-bit address is:
(A) 19
(B) 16
(C) 13
(D) 20
(E) 21

11. In standard C, whether char is signed or unsigned by default is: (A) Always signed (B) Always unsigned (C) Controlled by pragma (D) Undefined behaviour (E) Implementation-defined

12. You are designing an ALU that must support the rotate-through-carry left (RCL) operation on 32-bit registers. If the current CF = 1 and the operand is 0x80000000, what are the new value of the register and the new carry flag? (A) 0x00000000, CF=0 (B) 0x00000000, CF=1 (C) 0x00000001, CF=0 (D) 0x00000001, CF=1 (E) 0x00000003, CF=1

13. You benchmark QuickSort and Measure that its running time on random permutations doubles when n grows from 2M to 4M. Which average-case complexity class is most consistent with this observation? (A) O(n) (B) O(n log log n) (C) O(n log n) (D) O(n) (E) O(n²)

14. A university has the prefix 2001:0db8:acad::/48 and wants 400 subnets. What is the smallest subnet mask that meets the need and keeps addresses aligned on nibble boundaries? (A)/52 (B) /56 (C) /48 (D)/60 (E) /64

15. A 900 MHz microcontroller must process each PWM cycle in ≤ 90 instruction cycles. An ISR currently compiles to 112 cycles. Which optimisation meets timing with least code change? (A) Unroll loops (B) Inline all function calls (C) Move ISR to lower priority (D) Switch to Thumb-2 (E) None of the above

16. A function returns std::vector＜T＞ foo();. At call-site you write: Why might the extra std::move() be worse than writing v = foo();? (A) Disables copy elision (B) Prevents RVO (C) Converts to Ivalue reference (D) Increases alignment padding (E) None of the above

17. A company's e-commerce database has a "products" table with 10 million rows. A query "SELECT * FROM products WHERE price BETWEEN 100 AND 200" takes 45 seconds. What optimization would provide the most significant performance improvement? (A) Add more RAM to the database server (B) Increase the number of CPU cores (C) Partition the table by product category (D) Use a faster SSD storage (E) Create an index on the price column

18.A processor has a 32KB L1 cache with 64-byte lines. A program accesses a 2D array of 1024×1024 integers (4 bytes each) in column-major order. Assuming the cache is initially empty, approximately how many cache misses occur in the first complete column access? (A) 1024 (B) 4096 (C) 16384 (D) 65536 (E) 1048576

19. A company implements AES-256 encryption for sensitive data. Each encryption operation takes 0.1ms. If they need to encrypt 100GB of data in 1-hour batches, what is the minimum number of encryption threads needed to meet the deadline? (A) 100 (B) 200 (C) 400 (D) 1000 (E) 2778

20. A real-time system has 3 periodic tasks: T1 (period=50ms, execution=10ms), T2 (period=100ms, execution=20ms), T3 (period=200ms, execution=40ms). Using Rate Monotonic Scheduling, what is the CPU utilization? (A) 60% (B) 70% (C) 80% (D) 90% (E) 100%

115年 - 115 中央警察大學_碩士班入學考試試題_資訊管理研究所：計算機概論#139860

114年 - [無官方正解]114 臺灣綜合大學系統_學士班轉學生考試試題:計算機概論#137952

114年 - [無官方正解]114 台灣聯合大學系統_學士班轉學生考試試題:計算機概論#137764

110年 - 110 國立中央大學_碩士班招生考試_網路學習科技研究所：計算機概論#124075

110年 - 110 國立臺灣科技大學_碩士班招生試題_營建工程系(戊組)：計算機基本概念與程式設計#113110

110年 - 110 國立高雄科技大學_碩士班招生考試_電子工程系：計算機概論(丙組)#110504

110年 - 110 國立高雄科技大學_碩士班招生考試_資訊管理系：計算機概論#110413

110年 - 110 國立臺北教育大學_碩士班招生考試_資訊科學系：計算機概論#105558

110年 - 110 國立中山大學_碩士暨碩士專班招生考試_資管系/甲、乙組:計算機概論#105543

110年 - 110 國立政治大學_碩士班暨碩士在職專班招生考試_ 資訊科學系碩士在職專班一般組:計算機概論#105482