4. (10%) Analyze the circuit shown in Fig. 4 to determine the voltages at all nodes and the currentsthrough all branches. Let V t = 1V and k ’n(W/L) = 1 mA/V 2. Neglect the channel-lengthmodulation effect (i.e., assume λ=0). (10%)

5. (20%) Fig. 5 shows a discrete common-source MOSFET amplifier utilizing the drain-to-gatefeedback biasing arrang ement. The input signal vi is coupled to the gate via a large capacitor,and the output signal at the drain is coupled to the load resistance RL via another large capacitor.We wish to analyze this amplifier circuit to determ ine its small-signal vo ltage gain, its inputresistance, and the largest allowable input signal. The transistor has V t = 1.5 V, k’n(W/L) = 0.25mA/V2, and V A = 50 V. Assume the coupling capacitors to be sufficiently large so as to act asshort circuits at the signal frequencies of interest.

4. (10%) Analyze the circuit shown in Fig. 4 to determine the voltages at all nodes and the currentsthrough all branches. Let V t = 1V and k ’n(W/L) = 1 mA/V 2. Neglect the channel-lengthmodulation effect (i.e., assume λ=0). (10%)

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