7. Message Authentication Codes (MACs) provide:
(A) Integrity and authenticity
(B) Non-repudiation and confidentiality
(C) Confidentiality only
(D) Key exchange
(E) Forward secrecy

8.A max-heap stored in an array of length n guarantees that the parent of the node at index i is at: (A) floor(i/2) (B) floor((i -1)/2) (C) ceil(i/2) (D) i-1 (E) floor(i/3)

9.In 8-bit two's-complement arithmetic, adding 0x73 + 0x94 raises the overflow flag because: (A) Signs differ but result is negative (B) Both operands are positive but result is negative (C) Carry-in to MSB = carry-out from MSB (D) Parity bit = 0 (E) Half-carry occurred

10. A 64-MiB main memory is byte-addressable. A 4-way set-associative cache of 32 KiB uses 64-byte lines. Number of tag bits in a 32-bit address is: (A) 19 (B) 16 (C) 13 (D) 20 (E) 21

11. In standard C, whether char is signed or unsigned by default is: (A) Always signed (B) Always unsigned (C) Controlled by pragma (D) Undefined behaviour (E) Implementation-defined

12. You are designing an ALU that must support the rotate-through-carry left (RCL) operation on 32-bit registers. If the current CF = 1 and the operand is 0x80000000, what are the new value of the register and the new carry flag? (A) 0x00000000, CF=0 (B) 0x00000000, CF=1 (C) 0x00000001, CF=0 (D) 0x00000001, CF=1 (E) 0x00000003, CF=1

13. You benchmark QuickSort and Measure that its running time on random permutations doubles when n grows from 2M to 4M. Which average-case complexity class is most consistent with this observation? (A) O(n) (B) O(n log log n) (C) O(n log n) (D) O(n) (E) O(n²)

14. A university has the prefix 2001:0db8:acad::/48 and wants 400 subnets. What is the smallest subnet mask that meets the need and keeps addresses aligned on nibble boundaries? (A)/52 (B) /56 (C) /48 (D)/60 (E) /64

15. A 900 MHz microcontroller must process each PWM cycle in ≤ 90 instruction cycles. An ISR currently compiles to 112 cycles. Which optimisation meets timing with least code change? (A) Unroll loops (B) Inline all function calls (C) Move ISR to lower priority (D) Switch to Thumb-2 (E) None of the above

16. A function returns std::vector＜T＞ foo();. At call-site you write: Why might the extra std::move() be worse than writing v = foo();? (A) Disables copy elision (B) Prevents RVO (C) Converts to Ivalue reference (D) Increases alignment padding (E) None of the above

17. A company's e-commerce database has a "products" table with 10 million rows. A query "SELECT * FROM products WHERE price BETWEEN 100 AND 200" takes 45 seconds. What optimization would provide the most significant performance improvement? (A) Add more RAM to the database server (B) Increase the number of CPU cores (C) Partition the table by product category (D) Use a faster SSD storage (E) Create an index on the price column

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